Re: [f-cpu] new manual version

[Ben Franchuk <bfranchuk@jetnet.ab.ca>]

Yann Guidon wrote:

> 
> in the most recent version, i simply use a 4-input MUX :-)
> the "logic" transformation is performed by a LUT during the
> decoding or Xbar cycle. look at the "stable" source code.
Hmm I see where I got confused. Looking at the well written
but un-readable VHDL code I can see where I got confused.
Your logic is still simpler than mine but had you written

Out = F1 * /A * /B
    + F2 * /A * B
    + F3 * A  * /B
    + F4 * A  * B

I would have got less confused. The logic I had does look
like it would make a nice generic ALU ( but not for the F-CPU)
if I add carry logic.

Would modified INC/DEC unit be useful for +2,4,8 -2,4,8 constants
and another INC/DEC instruction. I am thinking of a language like
FORTH where they pop and push stuff on a stack like mad and use 
of the general adder could be a bottle neck on this kind of address
calculation.

 
-- 
Ben Franchuk - Dawn * 12/24 bit cpu *
www.jetnet.ab.ca/users/bfranchuk/index.html
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