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Tr:Rep:Re: [f-cpu] "Tree"



-----Message d'origine-----
De: <nicolas.boulay@ifrance.com>
A: <goeritz@oekomm.de>
Date: 11/01/02
Objet: Rep:Re: [f-cpu] "Tree"

-----Message d'origine-----
De: Juergen Goeritz <goeritz@oekomm.de>
A: f-cpu@seul.org
Date: 11/01/02
Objet: Re: [f-cpu] "Tree"

On Thu, 10 Jan 2002, Kim Enkovaara wrote:
> I think same applies to state machines. I consider
state machines done
> even with RTL level. And if the SM is done in RTL I
think the
> synthesizer should select the coding of the state
vectors etc. Usually it
> has better knowledge about the constraits of the
architecture and what
> creates fastest solution. Optimal solution I think
is higher level SM
> description where you only draw states and tell
state transition rules

Igitt! My experience is that drawings should only be
an output
but not an input to the design. Otherwise it's real
SM and it
costs you nerves without end to include those changes
into the
design. 

> etc. The problem is how to rely that high level
description directly to
> synthesis level. Usually that high level SM is
converted to RTL code,
> after that the synthesizer reads the RTL code and
sees that it is a SM, 
> and optimizes it at high level again.

Why convert to RTL code. Every synchronous
statemachine can
directly be translated into a function table without
thinking.

The only statemachines I have great respect of are
those
that treat each input signal as a clock and remember
the
contence by the device delay feedback only (no
registers).

>>>> A nice feed back asynchronous loop ! I don't
think that a verifing tools could handel that.
(static timming analyser,...). I don't that will be
allow to produice such design by a foundry. It could
be done only by hand with a very specific technology,
so it will not be portable at all.

>>>>>>Maybe you should read about F21. It's a
complete assynchonous design. It run at 2 ns for a
cycle for a 0.8um technology. It doesn't use neither
double rail logic nor hand checking. I was in contact
with one of the guy from  the team who write it. But
i don't know how they time there cpu.
nicO

JG

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