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[f-cpu] Codesign and SystemC

i answer to JG, but my mailer didn't want to copy
it's mail.

On Thu, 10 Jan 2002, nicO wrote:
> Codesign aren't only simulated SW with HW, it's a
way of design. The
> idea is to clearly describe your specification.
Formal language are the
> best for that because it will proove some
properties. Todays tool's
> maker try to implement "runnable specification".
SystemC is born with
> that idea in mind.
> I don't thing it the best idea because to run
something, you _must_
> allmost finish a kind of simulation of your system.
But at least, you
> don't need to write synthetisable stuff.
> So you try to push the SW/HW split as far as you
can to find the best
> cut. So you avoid redesign or late problem. It's
well know that later a
> problem is found, more costly it is. I have even
read that cost are 10x
> at each level.
> So, by using SystemC, you are supposed to win a lot
of time, the feed
> back are quicker and much more efficient.

Ohh! But even with SystemC you can't really
co-design. You
can't just write your software and move the sw/hw
split later
BECAUSE you already have to write those parts
hardware level
C that you want to be able to put into hardware
later. This
means you aren't really using a new method but a new
- the division is done also in relatively early
stages of the

>>>> The split must NOT be done at early stage. It
will be done at the LATER point. Why because
dependanding of performance you want, you could do to
choose to put thing inside a pure static hardware
engine, a application specific cpu or in pure
software. This choice could only be "well" done after
fine analysys of the algorythme. Todays a choice is
made and the algorythme sould feet in it. So you take
udge DSP to have enough marges, in case of problem.
SystemC are C++ so your could always start to write
things in pure software style and then you refine
your model to have working hardware (after split) (an
other advantage is the speed 1000 x quicker than VHDL
simulation !)

What I would want is to write just a normal program
have a tool that extracts me the parts of my complete
functionality that can be put into hardware. I don't
restrictions on the programming style side. And I
want a

>>>>There isn't any restriction ! They come when you
want to synthetis things after the split, when
performance requirement are well known and
specification fixed.

tool that tells me about the achievable performance
every step of the development process. Only then you
make intelligent decisions.

>>>> Some tools exist to do that : eArchitect from  i
don't know which compagny, ... They call that :
Architecture exploration.


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