[f-cpu] Problem with load/store size flags on >64bit F-CPU

[devik <devik@cdi.cz>]

Hi,

assume you have 256bit cpu. Then you certainly want to
load whole register at once (whole cache line :))).

But as there was already said we don't need (or want to
implement) more that 64bit chunk size.
But then when one sets size flags to 8/16/32/64 bits
(which is very useful combination imho) he can't do it.
When is sets 8/16/32/256 he can't use 256 for other than
LSU ops.
Would not be better to have separate SRs for LSU so that
they use different size meaning ?

devik

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