Re: [f-cpu] How to increase the mip/mhz ratio.

["Marco Al" <marco@simplex.nl>]

From: "Yann Guidon" <whygee@f-cpu.org>

> nothing forces you to do _all_ that.
> btw, the _best_ MOPS/MHz computers are vector computers :
> 1 issue, many identical operations per instructions,
> low architectural complexity. still unbeaten for the "heavy" stuff.
> i don't say that we must go vector, but it's just a "cultural"
> reference and counter-example : a simple architecture can
> do great stuffs. Yet, if you run LISP or JAVA stuff, or something
> silly like that, vectors won't work and someone will want to
> make a stack machine... it's endless.

If you want to keep say a 1024 wide vector processor busy you got a
lot of loop unrolling and software pipelining to do... and like with most
old school solutions you are stuck with a single instruction mix and
memory access pattern, and if it doesnt match your architecture tough
cookies.

Nice for simulations, but not for contemporary computing.

Stack machines (or accumulator designs for that matter :) arent that
bad for single issue processors, and for massively parallel processors
the best building blocks are going to be single issue (possibly with
SIMD) or VLIW... a processor with an ISA designed to be scalable
to superscalar implementations need not apply.

> now what if your brilliant idea goes superscalar ? (i know you want
> to avoid that, but let's imagine ...)

Thats the other side of the coin, there is no one size fits all... an
implementation with a "scalable" ISA will not be a processor which
maximizes MIPS/die-area and vice versa.

IMO directly encoding dependency into instructions is the best low
overhead way to allow scalability BTW.

Marco

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