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Re: [f-cpu] Prefetch and Preload

Ben Franchuk wrote:
> Thomas Lavergne wrote:
>>>1) What distance should be used for prefectch (how many cycle beteween a
>>>prefetch and the effective load)
>>>It depend, if you're in cache no need for it (you lose a cycle for
>>>nothing). If it's not in cache you could take 150-200 cycle. But if the
>>>distance is too small, depending of the implementation, you could also
>>>lose one cycle (because the underlying system didn't find the adress in
>>>cache and relaunch a read to the DRAM). If it's too far, the data should
>>>have been trash by another data.
>>>Then trash or not and cache hit or not depend on the cache type (size
>>>and associativity) so it depend on the effective memory adress of the
>>>manipulated data. That's why i didn't like prefetch...but preload.
>>Ok so Prefetch is very hardware specific. Very bad :-( but I seem we
>>don't have any other solutions.
> So why can't one make them pesudo-variables in special registers?
> It seems a lot of timing information is needed for tomorrow's designs
> where real memory and internal processing speeds differ by so much.
> If we have this information on timing the software could better make use
> of free time. A test for 25% full or empty on buffered information could
> be very useful for dynamic optimzation.

OK but you can't realy use this information at runtime to place your 
prefetch at a good place because you can't reorder your code durrinf 
execution (too complicated).
The only thing you can do is to produce different code and execute the good.

Thomas Lavergne                       "Le vrai rÍveur est celui qui rÍve
                                        de l'impossible."  (Elsa Triolet)
d-12@laposte.net    ICQ:#137121910     http://assoc.wanadoo.fr/thallium/

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