Re: [f-cpu] more about f-romfs

[Andreas Romeyke <art1@it-netservice.de>]

Hello,

> F-CPU has 3 things :
>  - Flash starts at address 0
>  - there is the SR address range where authorised code
>     can read / write configuration words
>  - there is a private SDRAM range that is defined in the SR space.
> that's all and there is no way to know where to send data to/from I/O.
> Unless we define a SR-mapped I/O channel.

Par example the Motorola 68302 (communication-processor) init-process is
in short:

1. set BAR (basis adress register)
2. define with base and mask the RAM/ROM/Port-areas, means the
chip-selects
3. Code will be executed from CS0, means ROM at adress 0
4. define the stackpointer
5. define IRQ-tables
6. test RAM

The M68302 has a internal dual-port RaM of 2K, first 500 Bytes
(plusminus) are user-defined, then there were basis registers for
communication with parport, risc-stuff, processor-configuration...


In that way, we should have also an init, we need registers to define a
chipselect for a port-memory-range to use this as an interaction with
external peripherie, to define, where boot-ROM start etc. 


If the CPU exists in this way, there is really not a problem to test the
CPU and to develop a mainboard or some other funny stuff...

Or I am misunderstood something...

Bye Andreas 

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