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# Re: [f-cpu] magnetude comparison

Michael Riepe a écrit :

Hi once more,

On Tue, Mar 02, 2004 at 02:23:09AM +0100, gaetan@xeberon.net wrote:
[...]

i have something like:
sel = C and (not(g) or (MSB and L) )
d=3/t=3

That could at least be written as

sel := (C and not g) or (C and MSB and L);

Another version would be

case C & MSB is
when "00" | "01" => sel := '0';
when "10" => sel := not g;
when "11" => sel := not g or L;
when others => sel := 'X';
end case;

and if i've understood what you said, it's the control path which will define the
delay of the mux (because controls arrive the lattest), so the delay is d=2/t=2

it's the output selector of compound adder in close datapath (rounding to nearest)
since MSB, L and C comes from the A+B output of the adder, is a full length delay.
+ mux4 to select beween the 4 rounding mode selectors (d=1/t=1)
+ mux2 to select the output
=> i have the rounded result ~d=5/t=5 after the adder.

You're going the wrong way.

:'(

You have two signals that arrive rather late (C and MSB). You combine
them with other (earlier) signals (g and L), and the result is even
later. Then you combine them with another set of even earlier signals
(the rounding mode), producing an even later result and so on. See
what is wrong with that? There's a huge pile of logic "behind" the
late signals, which delays the result even further.

I'll give you an example how to do better. It's based on a
transformation called "decomposition": Given a boolean function
F with n inputs, y := F(a<1>, a<2>, ... a<i>, ... a<n-1>, a<n>),
you can also write

if a<i> = '1' then
y := F(a<1>, a<2>, ... '1', ... a<n-1>, a<n>);
else
y := F(a<1>, a<2>, ... '0', ... a<n-1>, a<n>);
end if;

a<i> is "factored out", leaving two simpler subexpressions with n-1
inputs each. The transformation can be repeated if necessary; if
you repeat it recursively until all function values are constants,
you will obtain a so-called "binary decision diagram", BDD.

There are also other kinds of decompositions, using different formulas.
Another popular one is

y := u xor (a<i> and v);

with the subexpressions

u := F(a<1>, a<2>, ... '0', ... a<n-1>, a<n>);
v := F(a<1>, a<2>, ... '1', ... a<n-1>, a<n>) xor u;

but it's less suitable in our case. It's a good choice when you
already have u and v, and u arrives later than both v and a<i>,
as in a carry-increment adder, for example. If a particular input
signal arrives late, the first decomposition variant is better.

one of the most complex signal is in the far datapath:
seladd = (not (c) and g and (LSB or r or s) ) or
( c and L and ( [LSB-1] or g or r or s) )

Ok, let's go with that. I assume L and LSB are the same thing...

yes it does.

[...]

it's the compound adder selector in the far datapath (for rounding to nearest)
=> so in this datapath i will have the rounded result d=6/t=6 after the end of the added... :(

Probably closer to d=3/t=3 if you follow my advice.

Finally, before nico objects to my coding style again:

:-)

Synthesizers may perform decomposition as well, and may obtain similar
results even from simple, "delay-ignorant" models. I doubt that many
of them will do it, however.

ok thanks a lot for all these informations let go back to work (report)...

--

~~ Gaetan ~~
http://www.xeberon.net

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