What I seem to understand is that you want to use a CMB switching far all
interrupts or exceptions, which sounds like a task gate. Is it really a good
idea ?
Heck no. That's exactly what I do NOT want. Interrupts must be fast. But
there is a big difference between Intel CPUs and the F-CPU: We don't
have stack push/pop instructions, and we don't have `direct load/store'
instructions either. We need to clobber at least one register in order
to save the rest (for the pointer). With SRB, all registers used inside
the ISR are saved automatically, and restored when the ISR exits. Note
that it may not be necessary to save/restore ALL of them -- if the SRB
is smart enough (should be labelled "smart register backup" ;-).