Re: [f-cpu] freeze signal

[Michael Riepe <michael@stud.uni-hannover.de>]

On Mon, Oct 08, 2001 at 01:42:54PM +0000, nicolas.boulay@ifrance.com wrote:
> Is it possible to add a signal to the entities to
> completly freeze its output. It's different from
> enable. The freeze signal must stop the pipeline or
> at least the output port of the unit, no new data
> should get out in the result port. 

Currently, the EUs contain no input or output registers at all; they're
supposed to be added at the next higher level.

> We absolutely need this kind of stuff to handel unit
> with a latency more than 1 (to manage the fact to
> have 2 data could be ready in the same time)

The scheduler has to take care of that.  It must delay the instruction
if there is no free "transport slot".

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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