Re: [f-cpu] Re: your mail

[justin anderson <justina@cat.co.za>]

On Mon, 08 Oct 2001, you wrote:
> On Mon, 8 Oct 2001, Michael Riepe wrote:
> 
> > Does that mean the F-CPU multiplier runs at >1GHz in an ASIC, and needs
> > only 3% of the die area? ;)
> 
> Well, Intel has managed to get >1GHz at 0.18u so 1GHz at 0.13u should not
> be impossible. And at 250kgate/mm^2 and 100mm^2 (quite small die) you can
> burn 750 kgates for 3% of the area. Cache memory takes most of the die
> area anyways. Have you ever opened FPGA packages, the dies are huge. Even
> something like 400mm^2 and over.
if you only run at 200Mhz or so cach can be external???


> 
> 
> > > Biggest disadvantage of big FPGAs is the price. ~$1000 is quite good price
> > > estimate in volume for the state of the art FPGAs.
> > 
> > When you say "volume", you probably mean 1000+ of them in a box, and
> > $1000 for each of them, right?
> 
> Yes, I meant that. FPGAs are expensive if you need the best performance
> and lots of gates.
> 
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