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Re: Re: [f-cpu] freeze signal

On Wed, Oct 10, 2001 at 12:44:27PM +0200, whygee@club-internet.fr wrote:
> hello,
> Michael Riepe <michael@stud.uni-hannover.de> :
> >On Wed, Oct 10, 2001 at 12:07:42AM +0100, Yann Guidon wrote:
> >[...]
> >> However, some code designed by Michael is not like that,
> >> but allows the specification of what pipeline depth is desired.
> >[...]
> >
> >I'm afraid that feature is gone forever.  It's easier to rewrite the
> >unit for a different pipeline depth than make it configurable.
> will you be able to write a configuration file ? (m4 etc.)

I'm able to do a lot of things... but this doesn't make sense.

It would be easier if synthesis tools (in particular, Synopsys) hadn't
so many restrictions -- I can't put multiple registers inside a single
process, for instance.  I also can't make a procedure or function that
instantiates a register (event expressions inside subprograms don't work
with Synopsys, although they're perfectly legal in simulation).

On the other hand, I don't want to cut all EUs in ultra-thin (2 gates
deep) slices and paste them together with configurable registers just
to keep the variable pipeline depth feature.

 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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