[f-cpu] registers

["Nicolas Boulay" <nicolas.boulay@ifrance.com>]

Just a little speach.

For my job, i work with sparc V7 clone (ERC32 from ESA) and V8 (LEON).
This cpu have no fpu. But you could add a fpu called Meďko from Sun.

Sparc V8 arch use 32 windows register (>100 registers but only 32 seeing
in a given time). When you add the fpu you receive 32 registers
dedicated to the fpu (the 32 fpu regiter are 32 bit but you could access
it by to for 64 bit double).

i have ask to our expert why adding new register set and not use the
integer register bank. I had in mind the f-cpu approach.

This answer was quite simple : "to use more register" !

Think about it for Fcpu !

That's not a bad point because there is very few case where you have to
use integer operation on flotting point number. So it's 2 class of
number with no real operation crossover. But this is also the case for
Fcpu : why mixing register bank for simple integer and vector ?

Nowadays we too often think about 64 bits register length. so 64 == the
biggest int number. But in fact, the most interresting vector size is
256 bits.

As you can see, using a register of 256 for storing an integer of 64
bits is a big waste ! Look at our programmation api. We always have 3 or
4 pointers in the register set, so 3/4 of the register will never be
used 95% of the time, what a waist, don't you think ?

I don't think we should split fp and int register but SIMD and scalar
number.

Why not having 2 registers bank, one SIMD, the other Scalar ? This add
1/4 of memory content inside the cpu but double the number of usable
registers.

I don't thing this change could will need lot of modification in
existing code.

nicO


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