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Re: gEDA-user: Gerber files
I have used Sunstone (PCB Express) for all of my boards. See my
additions to Dan's comments ---
On 4/12/07, Dan McMahill <dan@xxxxxxxxxxxx> wrote:
Craig Niederberger wrote:
> Hi Gurus, in using Sunstone to fab, they ask for these files:
> Layer 1
> Layer 2
> Top soldermask
> Bottom soldermask
> Top silkscreen
> Excellon Format Drill file
> Tool Size Report
> Aperture for 274D Format
> Outline Layer
>
> My pcb Gerber export produced the following files:
> bike.back.gbr bike.fab.gbr bike.frontmask.gbr bike.frontsilk.gbr
> bike.backmask.gbr bike.front.gbr bike.frontpaste.gbr
> bike.plated-drill.cnc
>
> It seems to me that these are the assignments:
> Layer 1: bike.front.gbr
> Layer 2: bike.back.gbr
> Top soldermask: bike.frontmask.gbr
> Bottom soldermask: bike.backmask.gbr
> Top silkscreen: bike.frontsilk.gbr
> Excellon Format Drill file: bike.plated-drill.cnc
yes.
> But what would these files be:
> Tool Size Report
they're looking for a file which maps tool number to drill diameter for
the Excellon format drill file. In the case of the files generated by
PCB, the drill size is embedded in the .cnc file. Near the top, you
probably have lines like:
T11C0.020
T17C0.040
etc.
Those specify drill sizes for T11 and T17.
This is the drill/tool file that they are looking for.
> Aperture for 274D Format
not needed. RS-274-D had the aperture list as its own file (very error
prone). RS-274-X (what pcb generates) embeds the aperture list.
> Outline Layer
For an outline Sunstone expects a continuous line around the perimeter of the
board on one of the PCB layers (maybe the top layer). I usually do
this by drawing a one mil trace on the top layer. There is probaby a
way to do this by merging the top layer and an outline layer.
> bike.fab.gbr
some times known as the "drill drawing". Shows a picture of the board
with locations of all drill holes, and a list of the drill sizes.
> bike.frontpaste.gbr
used for making a solderpaste stencil. Only needed if you have having
the board populated in a factory environment.
These are not needed to fabricate the PCB.
(* jcl *)
--
http://www.luciani.org
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