Re: gEDA-user: [PCB] Bug? Silk tracks clear poly on file reload

[Ben Jackson <ben@xxxxxxx>]

On Wed, Apr 02, 2008 at 10:25:17AM -0800, Dave N6NZ wrote:
> Using a version of PCB build from CVS during December that advertises 
> itself as version 1.99w, I find that tracks drawn on back silk block 
> polygons, but only when the file is reloaded. (I didn't try polys on 
> front, it might also have a problem.)

PlowsPolygon explicitly avoids clearing lines on silk layers.  In any
case, the lines should not clear polygons on COPPER, only on the silk
layer itself (if it was even enabled).

Can you send a sample file?  Maybe the real problem is that the line is
not on the silk layer after a reload.

-- 
Ben Jackson AD7GD
<ben@xxxxxxx>
http://www.ben.com/


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