Re: gEDA-user: net labels question

[John Griessen <john@xxxxxxxxxxxxxx>]

Stuart Brorson wrote:

> LVPECL_LINE_IN_P
> LVPECL_LINE_IN_N
> MRESET_L
> CML_OPTO_OUT_P
> CML_OPTO_OUT_N
> LATCH_L
> TTL3P3_DATA[7:0]
> LVDS_DATA[15:0]_P
> LVDS_DATA[15:0]_N
> 
> I did this because we used a spreadsheet program to attach routing
> attributes (e.g. diff pair length tolerances) to the nets, and being
> able to sort on logic family prior to attaching attributes was very
> useful.
> 
> We can't do this yet in gEDA.   :-(

It'll be nice when we can attach attribs once that affect all contiguous net
pieces and keep track of this "per net" attrib list in the netlist, and in pcb objects too.

John Griessen
-- 
Ecosensory   Austin TX


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