Re: gEDA-user: iVerilog/GTKWave - Viewing multi-dimensional arrays in GTKWave

[Stephen Williams <steve@xxxxxxxxxx>]

Some things have indeed been done. At the very least, you can
explicitly list in $dumpvars the array words that you want to
dump. The list needs to be explicit to prevent the explosion
of traces when you have large memories in your design.

Denis Daly wrote:
> Hi,
> 
> I'm trying to simulate a Verilog file with many multi-dimensional arrays.
> 
> e.g.
> wire [31:0] bus[7:0];
> 
> It appears that these signals do not show up in the VCD file and thus can't be viewed in GTKWave.  This was confirmed back in 2001 by Steve Williams.
> http://www.geda.seul.org/mailinglist/geda-dev44/msg00083.html
> 
> Have there been any changes to iVerilog or GTKWave since 2001 to allow for easy viewing of these multi-dimensional arrays, without needing to instantiate new wires?  It appears some tools like Modelsim and Aldec have implemented ways to do this.
> http://www.edaboard.com/ftopic148791.html
> 
> Thanks,
> Denis Daly
> 
> 
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-- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
http://www.icarus.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."


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