Re: gEDA-user: What is the problem with this benchmark test case?

["CN" <mis4@xxxxxxxxxxx>]

Steve,


Thank you for prompt response and the helpul suggestion.  I will look into this.


As I had mentioned earlier, I am relatively new to ivl.  Are there many using ivl in syntheis mode?  I have been monitoring this forum for a while, and I see almost no synthesis related discussions.


Cordially, CN



On Sat, 06 Aug 2005 08:12:46 -0700, Stephen Williams wrote:


CN wrote:

| Hello All,

|

| When I run the attched source prep3.v (it is an old, very small state machine benchmark

test)  thru ivl v0.8.1,  with -tfpga -parch=virtex

|

| I get something like:

|

| Assertion failed: ivl_lpm_selects(net) == 1, file xilinx.c, line 718

|

| Is there a problem with this test case?  Anybody has any suggestions as to how I might

modify ivl to run this?  I am willing to do the work, if some guidance can be given.

Thank you for the help!


You are fidding with synthesis here? Hmm..


What seems to be going on here is that the case statement is in an

asynchronous logic block, so it is trying to make a mux. The code

generator for the virtex device only knows how to generate code for

2-input and 4-input NUX devices. Thus when you change the select to

be 2 bits wide instead of 4 bits wide, it's happy.


The solution is to in d-virtex.c add the code needed to generated

nested muxes as needed to handle your 8-input mux.


--

Steve Williams                "The woods are lovely, dark and deep.

steve at icarus.com           But I have promises to keep,

http://www.icarus.com         and lines to code before I sleep,

http://www.picturel.com       And lines to code before I sleep."