gEDA-user: Icarus Verilog for post synthesis simulation

[Günter Dannoritzer <dannoritzer@xxxxxx>]

Hi,

Is anybody using Icarus Verilog for post synthesis simulation?

Is there a way to compile the SIMPRIM library from Xilinx into a library
file or does that need to be compiled every time again from scratch when
running the compilation?

Also, does the iSDF plugin support all the primitives generated by
Xilinx tools?

Thanks for the help.

Cheers,

Guenter




_______________________________________________
geda-user mailing list
geda-user@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user