gEDA-user: problem with vpi

[Ales Hvezda <ahvezda@seul.org>]

[ Ales here, I'm reposting this since majordomo didn't recognize the
  e-mail as being subscribed to the geda-dev mailinglist. Some of these
  are a few weeks old, since they got misplaced.  Sorry. ]
  
-- Cut here --

I am trying to learn about vpi interface to verilog.
I have been reading the Cadance VPI users Guide and Reference.
I have succesfully written a hello vpi world module.

Now I was trying some thing a bit more interesting. To print out
module and nets.
At the moment it core dumps at the following point.
     topModIterator = vpi_iterate(vpiModule,NULL);
according to the guide vpi_iterate should return a handle to a module,
with the second
parameter being NULL it should give me the the top module.

I am using snapshot 20011209. Does anyone know how to set up their
enviroment so I can use ddd  to get a better idea as to what is going
wrong.

Thanks



/*******************************************************************************

 * Test vpi program
 * vpi handle  File = printNets.c
 *******************************************************************************/

#include <stdio.h>
#include <vpi_user.h>

/******************************************************************************

 * User
program                                                               *
 * my
handle
*
 ******************************************************************************/

void printModules(){

     vpiHandle topModIterator;
     vpiHandle topModHandle;
     vpiHandle modHandle;

     vpiHandle netIterator;
     vpiHandle netHandle;

     char *NetName, *ModName;
     vpi_printf("got to here \n");
     /* create a module iterator that starts at the top  as indicated by
NULL */
     topModIterator = vpi_iterate(vpiModule,NULL);
     vpi_printf("got to here1 \n");
     if( !topModIterator ){
   return ;
     }

     /* use vpi_scan to iterate throught modules */
     while( topModHandle = vpi_scan(topModIterator)){


   netIterator = vpi_iterate(vpiNet,topModHandle);
   if(netIterator){
        while( netHandle = vpi_scan(netIterator)){
      NetName = vpi_get_str(vpiName, netHandle);
      modHandle = vpi_handle(vpiModule, netHandle);
      ModName   = vpi_get_str(vpiName, modHandle);
      if( ModName){
    vpi_printf("Net %s is in module %s \n",NetName,ModName);
      }
        }
   }
     }


}


/*****************************************************************************

 * Creating  structure
 *****************************************************************************/

void my_handle_register()
{
      s_vpi_systf_data tf_data;

      tf_data.type      = vpiSysTask;
      tf_data.tfname    = "$printNets";
      tf_data.calltf    = printModules;
      tf_data.compiletf = 0;
      tf_data.sizetf    = 0;
      vpi_register_systf(&tf_data);

}
// register the  task

void (*vlog_startup_routines[]) () = {
 my_handle_register,
 0
};
#############################

##Sample make file to compile a vpi routine with iverilog
CC = gcc
OBJECTS = printNets.o
DLL = printNets.vpi
CFLAG = -0

#compile all the objects
.c.o:;
 $(CC) -c -g -o   $@ $<

all: $(DLL) graycntr.v
 iverilog -N graycntr.v -o graycntr -m ./printNets.vpi

$(DLL): $(OBJECTS)
 $(CC) -o $(DLL) -shared $(OBJECTS) -lvpi

clean :
 rm -rf *.o
 rm -rf *.vpi
 rm -rf *~
 rm -rf core
----
Stephen Lohning
mailto:stephen.lohning@oxnee.com
Oxnee Pty Ltd                                   http://www.oxnee.com
ph: +61 (0)419506038