Re: gEDA-user: strange build failure

[Andy Peters <devel@xxxxxxxxx>]

On Dec 5, 2006, at 8:53 PM, Michael Sokolov wrote:

> For a hard-core UNIX programmer like me, the only way to design  
> hardware
> is to make it look like UNIX software: write the source with vi,  
> keep it
> in CVS and compile with make, all in the absence of a graphical  
> display.
> A graphical display won't do me any good because my mind can't handle
> it.  I have what's called an 80-column mind, meaning that my brain  
> can't
> really process anything that isn't ASCII in 80 columns.
>
> The text-based nature of gschem schematic and symbol files is another
> life saver for me.  While I do grudgingly use an X11 display while
> drawing schematics (the graphical aspect really pushes the limits  
> of my
> comfort zone), I very often exit gschem, fire up vi and edit my .sch
> files directly, right in the centre of my comfort zone.  I love ASCII!
> And when I do use the gschem GUI, I make heavy use of the keyboard
> shortcuts and use the mouse as little as possible -- I hate mice!

While it's not likely a serious PCB editing tool will be text based  
(top-shelf PCB layout people have excellent visual and visualization  
skills and can do a great job of using the least amount of PCB real- 
estate while getting the least-congested routing), "schematic" design  
entry can be done, and done well, in a plain-text format.

At my last day job (before the company was bought out and half the  
staff shit-canned, but I digress), we used a text-based pinlist  
design entry method.  The interface was emacs with custom menus, and  
the whole thing ran on Solaris (later ported to Red Hat and OS X).   
Basically, you placed components in your design schematic.  The  
components had a "spec file," which had a part number and a list of  
all of the pins on the device (which could be fun for a 456-pin  
BGA).  When placed on the "schematic," you could see the vendor- 
assigned pin number and pin name, and your schematic net name.  The  
"spec files" were pretty smart, as they contained not only pin name/ 
number info, but also loading info, so you could run a "netcheck"  
that ensured that input pins weren't left open, output pins weren't  
overloaded, etc.  The whole system enforced several rules.  All nets  
had to have "useful" net names, instead of like what the graphical  
schematic program which lets you not give a net label and it'd assign  
something like Net_C01 for you.  No-connects had a specific syntax.   
Etc. Being text-based made it a snap to use with CVS.  There were  
also a few post-processing back-ends. One was the "netcheck," a  
second built a Tango PCB netlist, a third used the database of part  
numbers to build BOMs and stuffing guides.

By being custom in-house, it neatly sidestepped the problem of  
vendors changing their proprietary formats, or getting bought, or  
both (Accel to PCAD, anyone?).

It was all pretty remarkable, built in-house and maintained over the  
course of about 15 years.  The biggest downsides to this were that  
there was a lot of tribal knowledge ("how does this work and where is  
it documented?"); it was constantly "in development" so it was not  
uncommon for the maintainer (who was also the company president!) to  
change something which broke everything; and of course in-house tools  
don't look good on a resume ("what schematic capture did we use?   
Uhh, none; a custom text pinlist ...").

PCB layout was still done with a graphical tool.  As I said, PCB  
layout is a visual process, no way around it.  We used PCAD, and  
migrated to Mentor Expedition for the large designs that PCAD choked  
on (24-layer VME boards, anyone?).  But the pinlist schematic front  
end remained until the company was consumed.

-a



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