Re: gEDA-user: Moving ADC data around

[Dan McMahill <dan@xxxxxxxxxxxx>]

John Luciani wrote:
> On 12/11/06, Peter TB Brett <peter@xxxxxxxxxxxxx> wrote:
>
> > Also... can anyone suggest a good way to build a square-wave clock 
> > generator
> > that can vary from 4kHz to 4MHz with a minimum of fuss and a decent
> > mark-space ratio?  I've been scratching my head about this for a 
> > couple of
> > days, and I still don't have a decent solution...
>
>
> Have you looked at a PLL with a divide-by-N counter in the feedback loop?
>
> I believe the part that I used was a Motorola MC145151 (this was a few
> years back).
> I believe the Motorola PLL parts are now sold by Freescale. If you can't 
> find
> them at Freescale try On-Semi.

If it were me and I were using a PLL for this I'd probably be more 
inclined to build a 4-8 MHz synthesizer followed by a divide by 
2/4/8/.... block.  That gives a nicer range for the PLL and a nice 50% 
duty cycle.  But there are certainly many ways of doing this.  You 
didn't really mention how accurate it needs to be (must it be based on a 
crystal?), required resolution or if it needs to be under digital 
control, or the required jitter.

-Dan


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