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Re: gEDA-user: Symbols and footprints and stuff, oh my
On Tue, Dec 04, 2007 at 06:49:10PM -0500, Dan McMahill wrote:
> This is a known problem in the current flow. I think the right answer here
As you'll see, I don't disagree, basically, about the long-term answer.
Are there any shorter-term solutions planned, or is that the realm of a
little sed script or some such that each of us arranges as we prefer?
> is to use a script to generate a library of heavy symbols for things like
> transistors. Search for a post by me that has something like symbol
> generator in the body.
My thinking, as far as it's gotten, goes something like this:
1) it would be really nice to be able to maintain close compatibility
with the lightweight symbol approach. One thing I don't like about
really heavy symbols (at least in the form I've encountered them in
other software) is that they're a pain to change (this is likely more
of an issue for schematic -> simulation). In principle there could be
a convenient "change [transistor] type", but it always seems to bite me
with a half-assed "let the user delete it and put a new one in by
hand", with messye details like part numbering and such left to fall
where they may.
So my thoughts are along the lines of what would be the least that
would allow the glue tools (schematic -> netlist, -> minimal pcb, etc.)
to do the work? For transistors, the convention seems to be to use,
eg., value=2N3904. Now, suppose there were a package=TO92 attribute,
and a simple table of value+package -> footprint+pin_mapping... with
the option to override the footprint at least with an explicit one for
backwards compatability (or a package not in the table)... Something
similar (perahps the same table?) would take care of simulation, though
for most parts I'm familiar with the package wouldn't change much
except the thermal resistance. But I don't play around in the GHz
range, so I dunno if it should be one table or two.
Anywhow, this doesn't *require* any changes to gscheme (or PCB or
*spice), though there's certainly room to make it more conveninent to
select parts there. But if I were going to try for a proof of concept
- which I really haven't time for right now, gotta *use* the programs
to get some boards prototyped in the next couple weeks - it could be
done by hand and wouldn't be much different than current usage that
> On some other symbols, you might see things like the pin called "1" being
> renamed to "IN" or "OUT". That file is purely for cosmetic purposes, i.e.
> if you skip it, your final artwork will not change.
Ahhh. It did do something with + and - for polarized caps, didn't notice
if it was actually necessary.
>> Then there's the footprints, which are good enough to use but not
>> ideal (eg, the m4 TO92 calls out pin 1 backwards from what seems to be
>> the usual practice for that package, at least for the inline-pins
> Does it match the JEDEC drawing?
I thought I'd come across a scan-in-pdf of the TO92 docs, but I can't
find it now; perhaps that's at the lab. I do have the closely-related
TO226, and JEDEC doesn't show pin numbers on that. It refers to "pin
two" w.r.t. the triangular pinout (leadformed from inline or molded
that way), but of course that's the same either way. :-(
> I hacked together a proof of concept thing for transistors and it works
> well. I posted it to the list a while back. I'd send again, but I'm in
> the middle of trying to find a computer to read that hard drive :(
Bah, more stuff I need to look for. :-)
Happy Holidays! Cry "Charge it!" and let slip the dogs of more.
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