Re: gEDA-user: Weirdness with Design Rule Checker

["George M. Gallant" <ggallant571@xxxxxxxxxxx>]

DJ,

Thanks. This is going out for boards. How do I do the via solid 
connection to
plane? Tried the cycle of thermals with no success. Option "Right" worked.

George

DJ Delorie wrote:
> http://www.delorie.com/pcb/tmp/george.html
>
> Left: Note that the trace has a clearance approximately the size of the via,
> and it wipes out part of the thermal.  The clearance is causing DRC
> problems as it's trying to clear copper away from the via as well ('K'
> on the line clears it completely away from the via).
>
> Right: A better solution is to let the line join with the polygon
> ('J') and change the via so that the line doesn't interfere with it
> (Thermal Tool, shift-click).
>
> Side note: if this is going to be a manufactured board (vs
> home-etched), you can use the thermal tool to remove the thermals from
> the vias, resulting in a solid connection to the planes.
>
>
> _______________________________________________
> geda-user mailing list
> geda-user@xxxxxxxxxxxxxx
> http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
>
>   


_______________________________________________
geda-user mailing list
geda-user@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user