gEDA-user: Drawing a schematic with a single-inline resistor network

["Jeremy Pedersen" <ubernerd.jeremy@xxxxxxxxx>]

Hello,

Some of you gave me great advice when I posted an earlier thread about the MilesTag project's PCB's having been drawn in ExpressPCB. Most of you suggested that I should redraw the schematics and boards in gEDA as a learning experience, and I took this advice to heart.

While it has been fun so far, I have run into a few issues which are keeping me from getting a good PCB layout.

Here are the issues:

--- Oh, and for reference, the schematic I am trying to draw can be found on this website on the 22'nd page of the "Technical Reference" PDF:

http://www.lasertagparts.com/mt5xx.htm  

The largest problem is the subject of this thread:

The schematic that I am trying to redraw has a few "parts" in it whose footprints I am not really sure about. The first is labeled on the original schematic as a "SIP Resistor network." I took SIP to mean Single inline package, and I can produce one of those easily with the m4 macros available in gEDA. The problem is in assigning the footprint. I thought if i named all the resistors that are part of this SIP, "R3" and assigned a footprint to one of them, then I could treat this the way the "slotted" Op-amps are treated in the gsch2pcb tutorial. No luck.

Then I remembered that those op-amps were slotted, so I added a numslots=5 (the single inline package contains five resistors) statement to the resistor-1.sym file, and slotdef lines for each of those slots. But when I went to assign a slot=1 line to the .sym file, gschem segfaulted! Now, I wasn't terribly surprised, since gschem 20060123 segfaults quite regularly (for no apparent reason) on my machine, but this segfault was reproducible. Any time I try to add a slot attribute to 
resistor-1.sym (mind you, I copied it somewhere else, so I have the original), gschem has a segmentation fault. The only clue I have about this failure is from gdb, and it isn't a great help since I didn't compile gEDA with debug flags (or whatever it is gdb wants). All I get when the program fails is "0xb7f9a330 in o_attrib_search_numslots () from /usr/lib/libgeda.so.25" and I don't really know how to interpret this.

Ideally, I would like to know if there is an easier way to do this. Does anyone know of a way to have a SIP resistor network? I need the whole thing to be named R3 and it can use the SIP m4 macro as its footprint.

Also, are there round footprints that indicate polarity that I can use for capacitors? If so, what are they called and how do I call them? 

Lastly -- and this isn't very important -- the 5.x.x. MilesTag schematic I am trying to draw has a connector which is "split" on the schematic so that pins 1-4 appear on the left side of the schematic and pins 5 and 6 appear in the middle. It makes the schematic look cleaner and it all has one footprint on the PCB. Is there a way I could do this in gschem? 

p.s. Every time I move a component in gschem, I have to redraw the wires which connect to it. This is a real hassle to say the least, is there a way I can make wires move with respect to the components they are attached to?

Thanks a lot,
Jeremy

-- 
 "Windows [n.]
A thirty-two bit extension and GUI shell to a sixteen bit patch to an eight bit operating system originally coded for a four bit microprocessor and sold by a two-bit company that can't stand one bit of competition."
(Anonymous)

~*~*~*~*~
* JDP :)  *   
~*~*~*~*~

_______________________________________________
geda-user mailing list
geda-user@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user