gEDA-user: very simple gnucap simulation

[Chris Cole <clecol@xxxxxxxxx>]

Hey all,
I was trying to do a simple gnucap simulation of a full wave rectifier 
circuit...probably something wrong in my schematic :(
Attached is my schematic test.sch, here's what i did:

ccole@studio:~/source/gaf/test$ gnetlist -g spice -o test.net test.sch
ccole@studio:~/source/gaf/test$ gnucap
gnucap> get test.net

* Spice netlister for gnetlist
gnucap> list

R1 ( 1 Vout )  10.K
D4 ( 0 1 )  1N404  area=NA( 1.)
D3 ( Vdd n0 )  1N404  area=NA( 1.)
D2 ( Vdd 0 )  1N404  area=NA( 1.)
Vin ( n0 0 ) SIN offset= 0. amplitude= 120. frequency= 60. delay=NA( 0.) 
damping=NA( 0.)
D1 ( n0 1 )  1N404  area=NA( 1.)
gnucap> build

>.model 1N404 D

>

gnucap> tran 1s 10s

#Time     
0.       
1.       
2.       
3.       
4.       
5.       
6.       
7.       
8.       
9.       
10.   

Any suggestions?


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