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gEDA-user: symbol net usage



I have created a symbol for the TI ADS1298. It has multiple power pins,
DVdd, DVss, ADvv, & AVss. For test purposes, I declared 1 of the pins as
a net.

Loadiing the schematic gives:

Read garbage in [ads1298-1.sym] :
>>
net=AVdd:21
<<

Is there a tutorial available that describes the proper syntax for using
the net feature?

The intent here is to guarantee that the design check tools can verify
the power connections. (3 reviewers missed a AVss routed to AVdd!!!)

George


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