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gEDA-user: Register enables in Icarus
- To: geda-user@xxxxxxxx
- Subject: gEDA-user: Register enables in Icarus
- From: David Howland <dhowland@xxxxxxxxxxxxx>
- Date: Thu, 06 Jan 2005 14:45:07 -0500
- Delivered-to: archiver@seul.org
- Delivered-to: geda-user-outgoing@seul.org
- Delivered-to: geda-user@seul.org
- Delivery-date: Thu, 06 Jan 2005 14:45:28 -0500
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- Sender: owner-geda-user@xxxxxxxx
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Say I want to make a clocked, enabled register. This would simply be
the following in behavioral verilog:
always @(posedge clk) begin
if (en) begin
Q <= D;
end
end
That verilog will work with most tools, but it seems to me that if I
want to use Icarus synthesis, I have to change the code to the following:
always @(posedge clk) begin
if (en) begin
Q <= D;
end else begin
Q <= Q;
end
end
However, this doesn't really describe a register with an enable signal.
Is this making any sense?
Thanks for any insights.
-d