Re: gEDA-user: symbol creation / spice netlisting

[sdb@xxxxxxxxxx (Stuart Brorson)]

> What symbol should I contribute then? The symbol creation guide says "no
> power pins", but when I leave them out, gsymcheck produces a warning
> (less pins then footprint size). The contribution site
> http://www.geda.seul.org/tools/symbols/contrib.html says, gsymcheck
> should produce no warning when contributing a symbol.

I guess you mean this page:

http://geda.seul.org/docs/current/symbols/node10.html

This doc needs to be edited & changed IMHO.  Anyway, note that it says
that the rule may be broken.

It's marginally OK for an old logic circuit which is all 5V TTL to
have hidden power and GND pins.   This is an old, rapidly obsoleting
practice.  Few designers design such circuits nowadays, and few still
follow this practice.

It's always been unacceptable for analog ICs to hide the power
pins. First, analog often has multiple power connections (VCC, VEE)
which need to be explicitly drawn out.  Second, good design practice
is to place decoubling caps on each and every power pin.  These should
be drawn into the schematic at the component symbol itself.  

New logic circuits often use multiple supplies for different
chip sections (OVDD, DVDD, etc).   It is also typical to have several
logic families on a single board (5V, 3.3V etc.).  Therefore, it's
best to explicitly place and wire the power pins on the symbol.
Hidden power pins are a recipe for disaster.

Finally, as long as the symbol passes gsymcheck, it should be ready
for submission.

Stuart