Re: gEDA-user: Vias with zero clearance in PCB?

[bumpelo@xxxxxxxxxxx]

> Very good suggestions/tips.  One pitfall you might encounter - some 
> board fab houses check the gerber files and occasionally flag an error 
> when you include zero-length lines (which in the gerber output are 
> distinct in that they are "drawn" rather than "flashed" like pads).  If 
> they don't like them and throw them out, you'll be in for a surprise.

Good point. I belive that the gerber generation code in pcb will automagically use a flash for zero-length lines, but I shall go check this to be sure since it's been years since I wrote that code.

h.