Re: gEDA-user: Net of Selected Common Pins Enroutes Shortest Path Through All Intervening Pins

[Stan Katz <stan.katz.hk@xxxxxxxxx>]

   Done. Thank you gentlemen. I understand queries such as mine are
   "clutter" in high quality list traffic, such as found here. Other such
   lists have mercilessly sent me to /dev/null in the past. I appreciate
   your kindness in responding.

   On Wed, Jan 6, 2010 at 12:15 AM, John Griessen
   <[1]john@xxxxxxxxxxxxxx> wrote:

   Stan Katz wrote:
    No matter
   >    how I draw the nets in gschem, the final rats nest runs produced
   in
   >    pcb is one trace, across all the pins on each side of the SOIC,
   as
   >    long as any of them are in the star end-run to the header pin. In
   >    other words, if  I want to tie pins 1,3,5, of the transceiver,
   to pin
   >    1 in the header, a rat route runs across pins 1,2,3,4,5, of the
   >    transceiver, shorting all of them together, and then routes to
   header
   >    pin 1. How can I separate these nets?

     Just add some copper running out from the pads a ways and then do
     "optimize rats"
     and you will see a ratnest more like you were expecting.  Like DJ
     said, ratlines
     don't conduct.
     John
     --
     Ecosensory   Austin TX

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References

   1. mailto:john@xxxxxxxxxxxxxx
   2. mailto:geda-user@xxxxxxxxxxxxxx
   3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user


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