Re: gEDA-user: Solder Mask Layer

[DJ Delorie <dj@xxxxxxxxxxx>]

> For those of us less familiar with the code, what is the internal
> design of pcb that forces you to do that? Are paste and mask layers
> not carried along at design time, but only created by output hids?
> (he speculates.... having only looked at the code enough to do tiny
> local patches).

The internal design is that the *only* layers are the copper ones,
plus a special exception for the two silk layers.  No paste, no mask,
no outline, etc.

One of the LF tasks was to add a layer type tag to each layer to
identify if it was copper, mask, paste, silk, or outline, and if the
drawings were positive or negative (i.e. anti-copper to cut up a
polygon on another layer).


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