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gEDA-user: gschem - various
- To: geda-user@moria.seul.org
- Subject: gEDA-user: gschem - various
- From: Georg Ritter <newsgr@gamebox.net>
- Date: Thu, 10 Jun 2004 11:40:04 +0200
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- Delivered-to: geda-user@moria.seul.org
- Delivery-date: Thu, 10 Jun 2004 06:40:23 -0400
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Hello,
Is there a way to increase the minimum linewidth that is used to render
texts and wires, etc.? on my 1600x1200 they appear very thin (1 pixel now) and
are a bit tiring because lack of contrast.
I've a another question where RTFM didn't enlightened me.
net= ist coming. Where is the meaning of all attributes documented? (because,
there is netname=, net= and somewhere in the docs I saw that also that label=
can be used to attach an object to a electrical net). Also what do I have to put
into fname= (.sym)?
How do I make all of the attributes of an part available when drawing a sym? To
specify the "hidden" power (Vcc) net for a Chip, any tricks (except emacs)?.
Normal .sch drawing for pcb manuf: I add 3.3V-plus-1.sym and Vcc-1.sym and
connect it by wire as I assume all digital parts have GND and Vcc as netnames?
This should give the desired result of connecting net V3.3 to Vcc, correct?
But what if I make a mixed voltage circuit where Vcc is 3.3V for the 3.3V parts,
and 5 for the some other ICs (both use the Vcc net as attribute and I cannot
override this in .sch?) how do I keep the powersupply separated?
Greetz and many thanks,
georg