Re: gEDA-user: Switching regulator question

[Peter Clifton <pcjc2@xxxxxxxxx>]

On Sat, 2007-06-16 at 21:53 -0400, DJ Delorie wrote:
[snip]

> > It seems that the lower the average input voltage, the higher the
> > average efficiency of the regulator is going to be,
> 
> Hmmm... most I've seen have a "sweet spot" that I'm guessing has to do
> with the duty cycle of the switcher.  But note that the efficiency
> depends on the quality of the catch diode on output; get the lowest Vf
> schottky you can, and look for a switcher that has a FET helper for
> it.

FET helper (AKA. "Synchronous rectifier")

I've not done much analysis on this, but remember switchers are constant
power devices. If you lower their input voltage, the current goes up. It
really depends on your loss mechanisms how this affects things.

Assuming an inductive switching trajectory, you can approximate
dissipation in a switch as being the frequency, times the integral of
(I(t) * V(t)). The inductive switching has V(t) constant at the "off"
Vds voltage, and the I(t) ramping from the on-state current down to
zero, over the switching time of the device. Doesn't seem that you gain
or loose anything here - assuming the switching time is not affected.

Differing on-state currents across the Rds_ON of your switch might
change efficiency somewhat though.

> > so I would ideally aim to have the largest input ripple possible,
> > which coincidentally allows me to choose a smaller, cheaper input
> > capacitor.
> 
> What I did was put in four smaller caps in a row, which reduces the
> ripple current through each.  That helps keep cost down too.

The trick is to make sure the lead + track inductance to each cap looks
similar (else the nearest one to the switch will fail first).

105 degree rated caps are often worse on ESR, so in some applications
will run hotter. I read somewhere that its best to use 85 degree caps
unless the heat is imposed _on_ the caps (rather than from internal
dissipation).

Ceramic caps are good for taking the edge off high-freq stuff, but I'll
go on record here saying I don't really know how to size them (as a
proportion of the total capacitance) for a given application.

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)



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