Re: gEDA-user: Gnetlist -g PCB

[al davis <ad151@xxxxxxxxxxxxxxxx>]

On Sunday 29 June 2008, Kai-Martin Knaak wrote:
> A check for pin type is even more worthless for analog
> applications.   There are perfectly reasonable and common
> opamp circuits that connect the pin 3 (input) directly to pin
> 6 (output).

Actually, pin type is important for modern analog design, and is 
used by modern analog simulators.

Using Verilog terminology, there is "direction" 
and "discipline". 

The "direction" can be one of "input", "output", or "inout".  I 
think everyone here so far has forgotten about "inout".  Spice 
supports only "inout".  If you think this is unimportant, you 
are assuming everything is "inout".  All pins on passives like 
resistors are "inout".

The "discipline" is something like "electrical".  Spice supports 
only "electrical".  In a more advanced sense there can be high 
voltage, low noise, high current, and other variants.  There 
can also be voltage only and current only disciplines.  
Non-electrical systems have a whole bunch of others.

As far as matching and design rules...  Obviously it is ok to 
connect an "output" to an "input".  You can't tie an "output" 
to another "output".  If everything on a net is "input" it 
isn't very useful, so that too would be a violation.

To determine the legality of connecting disciplines together, 
you need to set the rules somehow.  In Verilog-AMS, 
a "connectrules" block defines what you can do and how it is 
resolved.

It looks to me that geda has mixed the concepts of discipline 
and direction.  It probably has not been a problem yet but 
could become an issue in the future.  It certainly limits scope 
of designs it is useful for.



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