Re: gEDA-user: RFC: Towards a better symbol/package pin-mapping strategy (was: Re: slotting and power pins)

[Larry Doolittle <ldoolitt@xxxxxxxxxxxxxxx>]

Bill -

On Sun, Jun 28, 2009 at 12:26:10PM -0500, Bill Gatliff wrote:
> [greatly trimmed]
> It would be nice if there was an
> additional "layer of abstraction" somewhere between the symbol and
> footprint, such that actual pin assignments weren't made until the
> footprint (and slot, if necessary) were specified.
> It's just an additional layer of
> abstraction above/replacing the slotdef= parameter.

I basically agree with the argument.  The final trick that would
make a larger audience happy is the ability to back-annotate
the schematic with the physical pins -- and presumably a switch
for whether to display the physical or virtual pin IDs -- so that
the engineer can print out (for the field technician) a schematic
that has physical pins on it.  Even the original design engineer
wants such a printout when bringing the board up for the first time.

   - Larry


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