Re: gEDA-user: PCB: Stale rat's nest?

[Vanessa Dannenberg <vanessadannenberg@xxxxxxxxx>]

Since you guys asked about bugs, here are some things I ran into 
while using gEDA and gSchem..  Some of these aren't necessarily critical bugs, 
but they all affect the useability of the program, some quite severely 
compared to commercial offerings.  Here goes, very long list follows:

(A similar copy of this message went to Dan directly also, before I posted 
this)
=====

In the main Project Manager (`geda`) Window:

* Trying to load a badly formatted file sometimes causes a lockup.

* Creating a new project always pops up a "Project already exists, Overwrite?" 
dialog box, even though the project doesn't actually exist yet.  The window 
manager's borders and title bar are missing from this dialog.

* Creating a new Schematic Diagram inside the newly created project only adds 
a file to the list on the left.  It should call up gSchem and pass the 
schematic filename to it.

* Double-clicking on the filename in the list should do whatever is most 
appropriate for the named file.  E.g. double-clicking the schematic should 
pull up gSchem to edit the selected file.

* GEDA does not remember the last size of the Project Manager window, even 
after a proper, clean quit via the menu.

* GEDA does not remember the last project you had open.

* GEDA should offer an option to write a PCB-compatible netlist.  As it 
stands, it only writes SPICE netlists.

In gSchem (as called from the Project Manager, editing the newly created 
schematic)

* Seeing that the log always contains a few error messages (which are actually 
harmless) regarding the configuration, it would be better if the log window 
did not pop up by default.  Put those messages in the Project Manager's log 
window instead, where they're more out of the way.

* With that newly created schematic file, gSchem starts out with an insanely 
low zoom level, way too far away to actually read anything but the very 
largest components.  Rather, the zoom should default to something that makes 
any text on the screen easily readable, since text is generally always the 
same size at the start of a project.

* Call up the Library window, and select a simple part like a 7400.  Move the 
mouse over the gSchem window (and set your focus to that window if 
necessary).  Without clicking to place the part onto the schematic, change 
the zoom level with z/Z.  Now move the mouse a little bit.  The part you had 
selected will be drawn on the screen, and it won't always be where the mouse 
pointer is.  The ghost will disappear the next time you scroll the screen, or 
when you hit escape.  In the meantime, the part that is atta ched to the 
pointer remains attached, but often at some large offset...  the pointer is 
over here while the part attached to it is way over there floating around 
with the movements of the pointer, and the part attached is still being 
displayed at whatever size/zoom level that was in effect when the part was 
selected.

* Changing the Zoom level should *never* cause zoom in/out events to be added 
to the undo history.  It is handy to make changes to a circuit, discover an 
error, and be able to zoom in real close to some suspect region and do a few 
undo's to watch for some critical change to happen (I've done this many times 
in Eagle).

* If the gSchem Window loses focus, the part you had selected In the Library 
Window will occasionally be unselected, even though the item is still 
highlighted in the listing.

* As you know, most standard 74xx logic contain multiple gates per package.  
There seems to be no way to tell gSchem to assign 2 or more gates to a 
specific package.  Simply placing gate after gate onto the schematic should 
automatically assign them to the minimum number of packages as needed to 
contain those gates.  In other words, adding four NAND gates to the schematic 
should result in one package being assigned, not four.

* gSchem should never require the user to manually give each part a unique 
name, e.g. U1, C5, R22...  While it is somewhat easy to renumber all parts of 
a specific type, it should not be necessary for the beginner to use that 
function.

* Since gEDA interfaces with PCB, it would be wise to adopt some of the 
nuances present in PCB.  For example, holding control and clicking on a pin 
or point on screen should start a brand new line (I recognize the right mouse 
button ends the line, but it would be nice for consistancy).

* As expected, there are a fair number of parts in gSchem's library that are 
not in PCB's library.  GSchem should not allow you to place a part that is 
not in PCB's library, or it should warn you first.

* Keeping with the 7400 example.. Place four NAND gates from a 7400 on the 
schematic.  How do I order the gates so that each one is assigned to 1/4 of a 
7400 package, with the proper pin numbering?

* Add a few nets between pins randomly, just so there's something there.  Now, 
without altering the names/numbers of the four gates, tell gSchem to save 
this file out.  Now, tell gEDA to create a board layout from it, it will 
crash with this error:

Loading schematic [/media/home/vanessaCircuits/PowerSID/PowerSID-0.2.1.sch]
*** glibc detected *** free(): invalid next size (fast): 0x081ed9e0 ***
Aborted

* Take those four gates, and use the Autonumber Text function to renumber 
them.  Notice how they're *still* assigned to separate packages (look at the 
pin numbers to verify).  You'll have four devices, numbered U1 to U4.  Now, 
save the file and tell the Project Manager to create a schematic out of it.  
It will crash, with the same type of error as above.

At this point, I'm looking at a simple circuit with four gates and a handful 
of nets and no way to translate this into a PCB circuit board.

* Using the Project manager, start a new project and create a new schematic.  
Place one single 7400 NAND gate, name it U1, and add some nets to it to just 
connect all three pins together.  Save it, and tell GEDA to create a PCB from 
it.   GEDA should have, at this point, summoned PCB to display the newly 
created board.

* Manually open the board from the Project Manager.  PCB will report that 
there is no font information included in the board, and that it's reverting 
to the default font.

-----
* You'll see a single 14-pin IC in the upper-left corner.  Zoom in on it.  
Notice something missing?  There should be two rat lines on the board, 
connecting three pins together.  Ok, maybe they're just not being drawn?  Hit 
'o' to optimize the netlist and PCB will complain that there is no netlist 
loaded.  

Um, where do I get this netlist thing from?  I had to search the web and 
documentation to find out that `gnetlist` is the program that is used to 
actually convert gSchem's schematic into a netlist PCB can use...or so I 
thought....  So I leave PCB in the background,  and pop open a terminal to 
try this program out...

$ gnetlist --help
gnetlist: invalid option -- -
Usage: gnetlist [OPTIONS] filename1 ...filenameN
etc etc.

Ok, not the first time I've had an apparently GNU program ignore the standard 
--help command, that's fine... So I try following the help info that the 
program spat out anyway..

$ gnetlist ~/Circuits/Temp/test.sch  -o ~/Circuits/Temp/test.net
[etc etc..]
You gave neither backend to execute nor interactive mode!

Ok.., the help information to gnetlist didn't say how to specify a backend.  
So, I make a few guesses and I find that the -g switch specifies the backend 
to use.  So,

$ gnetlist -g pcb  ~/Circuits/Temp/test.sch -o ~/Circuits/Temp/test.net
[etc etc..]
Failed to read pcb scm file [/usr/local/geda/share/gEDA/scheme/gnet-pcb.scm]
ERROR: Unbound variable: pcb

Huh?  When did I ask it to set a variable?  What is this?  So, I look 
in /usr/local/geda/share/gEDA/scheme/ to see if maybe I named it wrong.  Oh, 
here it is in all caps.  WTF?  Ok, I can accept that it's all caps, which is 
kind of against the general flow of Un*x programs (normally everything is in 
lowercase).  Ok, adjusting...

$ gnetlist -g PCB ~/Circuits/Temp/test.sch -o ~/Circuits/Temp/test.net

And all I get is some warrantee stuff and a warning to check the schematic for 
errors.  To a learned Un*x user, a program normally returns exactly nothing 
at all but another shell prompt when it's successful (think cp, rm, tar 
without the 'v' switch, etc), so this seems a little out of keeping with 
standard programs.
-----

* Finally, a netlist has been created and I can load it.  I have two rat lines 
on the screen, plus two connections that I guess will be routed to a GND and 
+5v source later.

Now, purely for the sake of comparison, here's how it's done in Eagl:

1. Start a new Project.  Start a new schematic.  Maximize the window.
2. Select a 7400 from the parts library and place a single gate in the middle 
of the schematic window.
3. Run a few nets to connect the pins.
4. Click on the icon at the top of the schematic window to switch to the 
circuit board display.  Maximize the window.
5. Move the part where you want it.
6. Draw a border around the chip using the "Wire" tool on the "Dimension" 
layer.
6. Hit autoroute.  Done.

I recognise Eagle has it's bugs too, but this is a far simpler approach to 
designing a board than the convoluted method I had to use to do the exact 
same thing with gEDA and it's tools.  That schematic I drew at first, with 
the four gates in it, is still sitting there waiting for me to find a way to 
make a board out of it.

Now, purely for the sake of comparison, here's how I would do it with just PCB 
by itself:

1. Start a new layout.
2. Select a 7400 from the parts library and place the component in the middle 
of the layout area.
3. Name it "U1".
4. Run rat lines between pins 1, 2, and 3.
5. Draw a box around the part, using the line tool on the "Silk" layer.
6. Hit autoroute.  Done.

Basically, gEDA has a long way to go before it can match Eagle in useability, 
but it doesn't have far at all to go to match it in terms of actual 
*capabilities*.

I really hope to see either gEDA or KiCAD (the other one I'm tracking) surpass 
Eagle some day soon, so I can retire that damn crippleware of a program 
(Eagle) that I've used for way too long.

-- 
"Sometimes paranoia can be helpful. Usually it
isn't, and when you learn that, life improves."
Vanessa Dannenberg
-- 
"Sometimes paranoia can be helpful. Usually it
isn't, and when you learn that, life improves."
Vanessa Dannenberg