Re: gEDA-user: basic anti-EMI design q

[Steve Meier <smeier@xxxxxxxxxxxxxxxxxxx>]

In general (for precision high RF measurement electronics) I try to
seperate the analog power/ground from the digital power ground to
protect the analog from the digital noise.

The power can all come from the same regulators but putting a power
inductor with tantalum and chip capacitors on both sides seems to really
knock down the noise from one side to the other. I also use seperate
ground plains (the return path) and tie the analog ground to the digital
ground with a power inductor. Often each analog section will even be
seperated from other analog sections much the same way.  Use lots and
lots of tants, and chip capacitors between the power and ground planes.

Have you measured the ripple on the power supply?  To get latches (I am
presuming 5 V logic) to change states  you need some spikes of a couple
of volts. Are your digital lines reasonably terminated? Are they
seperated by long distances? On your current board you might try some
judicial use of pull up / pull down resistors on the latch traces.

Steve Meier


DJ Delorie wrote:
>Ok, you all know about the furnace project.  I'm starting to think
>about the next rev of the board (cpu, ethernet, etc onboard).  Mostly,
>I want to eliminate the beige box on the floor and redesign the system
>to be a lot more EMI tolerant.
>
>Keep in mind, this board is mounted inside a five-sided metal box,
>which is mounted on the metal air duct coming out of our furnace.
>This is the same furnace that includes a couple of induction motors,
>an electrostatic air cleaner, fire, water, refrigerant, and 18 gauge
>wires running all over the house.
>
>Needless to say, the existing board suffers from interference.  On the
>current board, the latches occasionally change state on their own, so
>I continuously set them to limit the fault time, but I can't reset
>them often enough to keep the furnace from clicking on-off
>occasionally.
>
>For the next board, I've planned a number of changes to protect the
>board.  The power supply is onboard (it's got to have 24vac anyway, I
>get +5 from that).  All I/O lines running around the house are
>isolated behind FETs (read and write), with LCL filters, shunt diodes,
>and small resistors.  Yes, even +5/gnd going out to the thermostats is
>LCL filtered.  There will be an opto signalling the CPU at 120Hz from
>the AC line (for master RTC and re-setting the ports).
>
>The design has 10baseT (20MHz) and a 32MHz CPU, plus the 150KHz or so
>switching power supply.  Looks like 8/8 rules suffice, which fit the
>0.5mm pitch nicely.  I/O lines are 1wire and 9600 baud serial.  Power
>switching is 24vac alternistors with opto isolation (no relays).
>Board is 5.5 x 3.5 inches, and the four standoffs are metal, so
>chassis ground is available (if attaching yourself to a spark
>generator is a good idea).
>
>So, the big question is - ground/power planes.  I could probably
>squeeze the design onto two layers, but power and ground traces would
>be going all over the place.  Going to four layers gives me power and
>ground planes, with easier signal routing.  An auxiliary question is,
>should I split the planes?  I'm thinking, isolating the power/gnd
>going to the I/O drive FETS and thermo power (i.e. the stuff going
>around the house) back to a common point near the power supply, and
>maybe splitting the 10baseT analog power similarly.
>
>Based on a goal of "minimize the effect of external EMI interference",
>what makes sense?
>
>