gEDA-user: Nested for loop?

[lingwitt@xxxxxxxxxxxxx]

Nested for loops don't seem to work in iverilog.
it would seem that only the inner loop is updated.

Consider the following:

module TestMultiplier;

    reg  signed [7:0 ] x, y;
    wire signed [15:0] z;

    initial
        begin
            $dumpvars;

            for (x = -128; x < 128; x = x + 1)
                for (y = -128; y < 128; y = y + 1)
                    #1 $display("%d * %d = %d", x, y, x*y);
        end

endmodule

Here x is always -128

Any help would be appreciated.


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