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Re: gEDA-user: Icarus Verilog with Xilinx simprims...

Günter Dannoritzer wrote:
Andy Peters wrote: 
Does iverilog support SDF backannotation?  The SDF has the delay
information.


Here are some information about that and a link to a previous discussion:

http://iverilog.wikia.com/wiki/Graffiti#SDF_support

I added a section to your entry covering the reasons for doing timing simulations (same URL).

Haven't quite got the hang of this wiki yet. I tried to add it as a second-level heading under 'SDF support', but it's gone in as a main heading...

Evan


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