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Re: gEDA-user: random project idea
Larry Doolittle wrote:
> Jesse -
>
>
> Of course, synthesis is the easy part, Icarus (almost, sort of)
> does that already. Place and Route is hard, especially because
> so little experience exists in the open source community.
> The real sticking point is bitstream generation, where Xilinx
> and Altera are traditionally anal.
>
>
Yes, bitstream generation and place and route is what I meant to ask
about. I only recently got an introduction to actual hands-on fpga
programming, and briefly at that. So I don't know all the right words,
but I've been bit by the bug of the amazing power and freedom that an
fpga affords.
(I got the digilentinc.com Basys
http://digilentinc.com/Products/Detail.cfm?Prod=BASYS&Nav1=Products&Nav2=Programmable
and also their $12 parallel JTAG cable, which works quite nicely in
Linux with the ISE Impact webpack from Xilinx.)
But my brief (or at least fruitless) search for a completely open
software solution for writing code and programming fpgas seemed to
suggest to me that there was some vital information that no fpga
manufacturer wanted to share.
So is the long and the short of it that no fpga manufacturer will
release the information needed to place and route or generate the bitstream?
> This question has a long history. Perhaps the most notable
> discussion is the 173-long thread titled "FPGA openness" in
> 2000 in comp.arch.fpga. I don't think anything important has
> changed since then regarding Xilinx or Altera.
>
>
Thanks for the tip. I read the first 50 posts I guess. I'm gathering
that indeed Xilinx does guard the secrets of how bitstream generation works.
> On the free front, we have the excellent research of Adam Megacz
> http://research.cs.berkeley.edu/project/slipway/
> Too bad the targeted device is so pathetic.
>
>
This does look very interesting! THanks!
> Also as a curiosity, see Reinoud's MPGA, an open source meta-FPGA.
> That one seems to have dropped off the 'net. Does anyone have an
> archived copy?
>
> - Larry
>
>
Can you please tell me a little more about meta-FPGA? I have no idea
what it means, but I was talking with someone (who knows slightly more
about fpgas then I, which still isn't much) a while back the general
idea of constructing an fpga inside an fpga, such that once a
high-gate-count fpga were programmed, it would function as a much
smaller fpga who's internal workings would be well documented and open
source, allowing hobbyists to experiment with completely free tools, and
perhaps some day a real fpga company would build a native one.
Thanks,
-Jesse
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