Re: gEDA-user: Free GNU/Linux hardware design tools

[Stephen Williams <steve@icarus.com>]

cej@os.dk said:
> Well, that figures. If only hardware makers would tend to making their
> hardware and ONLY making their hardware...  

To a degree, I agree with their choice to provide implementation
tools. That is, the map/par and bitstream generation. The trend
is to offer those for free, or very cheap, and allow other parties
do the value-added stuff like simulators and synthesizers.


cej@os.dk said:
> Simulation? Synthesis? Implementation tools? Can you put these in
> terms that even a software developer who doesn't know his latches from
> his flip-flops can understand? :-) 

You are in for a learning curve, and a steep one at that.

"Implementation tools" are the back-end tools that take a netlist
and do the final binding to hardware cells. That means the software
that maps simple netlists to LUTs, storage elements, places those
in CLBs and binds pads. This also does timing checks and timing
driven optimizations. I kinda think of this as the assembler for
hardware.

Synthesis is the process of taking a high level description and
translating that into a "netlist" of components. The output from
synthesis is fed to the implementation tools. The input is HDL
source, or schematics if you're that kind of person.

Simulation is the process of testing your design without burning
up real hardware. You run your design by writing a test bench that
exercises it and checking the results. You need a simulator that
understands the HDL you choose to you, and you can often mix C
into this step. Most of your hardware design work is spent simulating
your hardware.

Others may be able to suggest books or other learning resources.

-- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
steve at picturel.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."