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Re: gEDA-user: A Verilog AMS program to try
al davis wrote:
> On Saturday 10 May 2008, Dan McMahill wrote:
>> I think you want to declare your signals that you have listed
>> as 'voltage' as 'electrical'. Thats assuming verilog-ams
>> doesn't do things differently from verilog-a which I'm more
>> familiar with.
>
> "voltage" is ok ..
>
> It is defined in disciplines.vams.
>
> "voltage" is a signal flow discipline.
> "electrical" is a conservative discipline.
I stand corrected. You are right. I've only used the conservative
disciplines.
-Dan
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