Re: gEDA-user: How do I generate empty back silk?

[Peter Clifton <pcjc2@xxxxxxxxx>]

On Sat, 2007-11-10 at 08:48 -0600, John Griessen wrote:
> David Griffith wrote:
> 
> > Ugh...  Can we expect a checkbox option to toggle this in the next update?
> 
> If you code and test it.

Whilst the above suggestion probably does represent the quickest way to
get new features in gEDA / PCB, if you don't fancy that, please file a
feature request:
http://sourceforge.net/tracker/?group_id=73743&atid=538814

(The gEDA ones are
http://sourceforge.net/tracker/?group_id=161080&atid=818429)

Best wishes,

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)



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