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Re: gEDA-user: Ben mode feature request



Vanessa Ezekowitz <vanessaezekowitz@xxxxxxxxx> writes:

> On Mon, 1 Nov 2010 13:46:51 -0700
> Steven Michalske <smichalske@xxxxxxxxx> wrote:
>
>> I code the latter way, writing a good low level API that has a simple
>> command line UI, then I add the GUI on top of it when it is warranted.
>
> Which is precisely what I was suggesting; since such tools obviously
> already exist, why not build a GUI (or adapt an existing one) some
> time in the future that makes use of them as a backend, for those
> whose needs can't be met using only CLI tools?

Well, the public was invited to do exaclty that for years, but the need
for such a GUI was obviously not too urgent, so it never got very far.

The problem is probably, that the heavy coders here do not want to use
it themselves, so and those who want to use the GUI do not want to code
it.

I don't know how I should judge the situation.  

When our Linux-using students observe the unix plumbing magic that I
type into the xterm all day, and ask how they can learn all this, I
reply that they should never have started to use the graphical file
manager of their shiny desktop, but use a simple window manager and fire
up a lot of xterms.  OTOH, they'd be using Windows instead, if that was
their only option.

I could easily convert my eagle using colleagues to geda with an
integrating GUI, but then their productivity will not necessarily go
much beyond what they do with eagle.  

A GUI that does not hide the magic is a good way to go.  

For example, a history window that records all executed PCB actions
during a point and click session, that could be replayed as a script to
repeat all steps would be helpfull.  And to cut and paste actions into
the :command window.

I once did a push button digital ASIC design that way.  After place and
route I manually added the power distribution and similar touchups to
the layout.  Then I copied the actions into a script, that was later
called from a Makefile whenever I had to rerun place and route.  The
Makefile basically did the complete chip from scratch.  Modify a verilog
source file, type make, and got a new complete layout, synthesized,
simulated, place and route, LVS and DRC included.  I could only do that,
without any prior experience with the tools, because of that history
window.

-- 
Stephan



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