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Re: gEDA-user: Hierarchy question



Hi,

I ran into a similar issue with the Verilog netlister. I skirted the issue by adding a symbol with a special attribute attached, 'device', where the value was `IPAD', `OPAD' or `IOPAD'. When the netlister enumerates the instances on the schematic, it builds lists of the ports, based on the type attribute, and then ignores those special symbols when the actual netlist instances are written out. The VHDL netlister uses a similar scheme. (Literally.. ;-) You can look in gnetlist/scheme/gnet-verilog.scm for info.

AFAIK, no `standard' symbol was created to convey this information. Perhaps the time has come for this?

Mike

Bill Cox wrote:

Hi.

I can now read schematics and symbols into a temporary set of data structures, and build nets. I'm working on writing the data structures to the netlist database.

How do I know what the top level pins for a schematic are? I need to build a default symbol for the top level. The use of flags makes sense, but the IO symbols don't seem to make much use of the device attribute. I don't know how to tell what's a flag. How can I tell?

I'm thinking that flag symbols should set their device attribute to something like FLAG or IO.

Thanks,
Bill