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gEDA-user: import netlist formats
- To: geda-user@xxxxxxxx
- Subject: gEDA-user: import netlist formats
- From: Charlls Quarra <charlls_quarra@xxxxxxxxxxxx>
- Date: Mon, 3 Oct 2005 14:16:29 -0300 (ART)
- Delivered-to: archiver@seul.org
- Delivered-to: geda-user-outgoing@seul.org
- Delivered-to: geda-user@seul.org
- Delivery-date: Mon, 03 Oct 2005 13:16:44 -0400
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- Reply-to: geda-user@xxxxxxxx
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Hi,
I was wondering if there are scripts lying somewhere
to convert EDIF(.edi), SPICE(.spi/.sp/.cir), .vlg o
.vst netlists into schem/pcb netlists. I have my
schematics in structural vhdl and i'm compiling it
using alliance vhdl compiler. However when i need to
edit specific parts i would like to be able to use
gEDA. Anyone has already tried this?
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