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Re: gEDA-user: Current source rail blocking



Karel Kulhavy wrote:
gn Sun, Oct 29, 2006 at 07:09:46PM -0500, Dan McMahill wrote:

Karel Kulhavy wrote:

Hello

In my broadband high sensitivity amplifier I have a rail where bases of all
current source transistors are hooked up. Each current source is a transistor
with an emitter resistor which compensates variance in aplification so that
even unmatched transistors produce matched currents.


Do you have any recommendations how to block the current sources from picking
up some garbage from the air and causing oscillation? Should I block the rail
with a single big capacitor against the ground, or use individual capacitor for
each transistor placed between emitter and base?

What sort of transistors are these? Are you seeing oscillations in


2N3904


practice or is this just a concern prior to seeing any real hardware?


In practice.


I'd avoid using transistors which are faster than need be. For example, sticking a 20 GHz device in there may not be a good idea.

If you can tolerate some additional noise, you can stick some resistance in series with the base if the transistors themselves are oscillating.


Why does this help? Slows down the transistor by forming an RC lowpass
with the inherent E-B capacitance of the transistor?

Calculate the impedance seen looking into the base of a common emitter stage that has capacitance from emitter to ground. If you have capacitance to ground at the emitter, then there is an impedance proportional to 1/j*w there. Now refer that to the base side. At higher frequencies, the transistor current gain is falling off with frequency so now you get a 1/(j*w)^2 term in the impedance looking into the base. When you actually work out the math, you'll get some expression that will have a capacitive term along with a *negative* resistance term. Combine that with some inductance (from the board layout, package leads, etc) and you have an oscillator. The series R serves to produce a net positive resistance.


Is it possible to hook up a test circuit with the parasitics in gnucap and
run it and see it if it oscillates? Or is it just going to say "internal
node open" or fail to converge?

It should be very easy to simulate the negative input resistance. This is also easy to calculate by hand. To simulate oscillations you'll need to be sure you have a correct model for whatever parasitic inductance you may have in the base circuit.



BTW how does the reality work that it always converges? Is it possible to build a real electronic circuit that causes the universe to fail to converge and be terminated with an error message?

If not, why isn't the same calculation that is used to run the universe just
put into gnucap so it would converge every time?

Does gnucap convergence failure indicate the circuit would oscillate?
Does an oscillator circuit in gnucap always cause convergence failure on
transient mode simulation?

Many of my convergence problems (not speaking of gnucap but simulators in general) come from bad inputs. Reality usually doesn't include an ideal 1F capacitor or an inductor with no loss. Reality usually doesn't include a voltage coefficient on some element which causes a stable operating point with internal voltages outside the supply. Certainly a simulator can mess up too, but it's pretty easy to feed them a model which does not reflect reality.


Well, I want to build a current source from a single 2N3904 (or a double one if
it's a current mirror where the driving half can be recycled for multiple
mirrors) that gives 2.5mA constant current and behaves like a current mirror
to as high frequencies as possible (i. e. not something that is nicely
stable but from 10kHz up it starts behaving like a capacitor instead of
current source). How would you do it?

When you say behaves like a current mirror to as high freq. as possible, do you mean Iout/Iin is wideband or that the impedance looking into the output is as high as possible?


Your basic approach you already described is fine. I'd just pay particular attention to the potential for instability. This means don't add extra C to ground from the emitter and maybe leave room in your layout for some series R in the bases.

-Dan


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