Re: gEDA-user: Ground Flooding

[Peter Clifton <pcjc2@xxxxxxxxx>]

On Thu, 2008-10-02 at 23:59 +0100, Peter Clifton wrote:
> On Thu, 2008-10-02 at 14:48 -0700, Kingston Co. wrote:
> 
> > Also, you can fix this by editing your *.pcb file manually and adding
> > the "clearline" flag to all your lines.

URG... I'd not noticed that before. Every single line in the design has
to have "clearline" added. Sounds like hindsight would put the
"polarity" of this flag the opposite way around, but never mind.

> > (And you had every trace selected at the time you ran the command?)
> > 
> > Yes on both Computers!
> > 
> > Both Systems do the same thing.

Reading back to the original advice:


> You have a common problem.  You need to clear the "join flag" for all
> those lines.
>
> Select -> Select all
>
> :ClrFlg(Selected,Join)

There is a typo!

:ClrFlag(Selected,Join)
      ^

(I spotted this when I was sent the board directly to take a look at and
try myself).

I fixed it with the one I can remember, "changejoin(selected)", although
that one does toggle lines which already have the flag, to not having
the flag.

Mystery solved ;)

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)



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