Re: gEDA-user: using Icarus Verilog

[Stephen Williams <steve@icarus.com>]

nadig@web.cs.ndsu.nodak.edu said:
> I am able to compile the verilog source in vvp format.
> But how do i input stimuli to the verilog model to run the simulations
> ? 

You do need a Verilog book. The standard answer to this question,
though, is that you need to write a "test bench." That is, Verilog
code that instantiates your module and manipulates the ports of
your instantiated module.

And now the book:
	Verilog Quickstart!
	Second Edition
	James M. Lee
	Kluwer Academic Publishers
	ISBN 0-7923-8515-2


-- 
Steve Williams                "The woods are lovely, dark and deep.
steve at icarus.com           But I have promises to keep,
steve at picturel.com         and lines to code before I sleep,
http://www.picturel.com       And lines to code before I sleep."